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| NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P5506BVG SOP-8 Lead-Free PRODUCT SUMMARY V(BR)DSS 60 RDS(ON) 55m ID 5.5A D 4 :GATE 5,6,7,8 :DRAIN 1,2,3 :SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Power Dissipation Junction & Storage Temperature Range THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Ambient 1 2 1 SYMBOL VDS VGS LIMITS 60 20 5.5 4.5 20 2.5 1.3 -55 to 150 UNITS V V TC = 25 C TC = 70 C ID IDM A TC = 25 C TC = 70 C PD Tj, Tstg W C SYMBOL RJA TYPICAL MAXIMUM 50 UNITS C / W Pulse width limited by maximum junction temperature. Duty cycle 1% ELECTRICAL CHARACTERISTICS (TC = 25 C, Unless Otherwise Noted) LIMITS PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage V(BR)DSS VGS(th) IGSS VGS = 0V, ID = 250A VDS = VGS, ID = 250A VDS = 0V, VGS = 20V VDS = 48V, VGS = 0V Zero Gate Voltage Drain Current On-State Drain Current1 Drain-Source Resistance1 On-State IDSS ID(ON) VDS = 40V, VGS = 0V, TJ = 55 C VDS = 5V, VGS = 10V VGS = 4.5V, ID = 4.5A RDS(ON) gfs VGS = 10V, ID = 5.5A VDS = 10V, ID = 5.5A 20 55 42 14 75 55 m S 60 1.0 1.5 2.5 100 1 10 A A V nA MIN TYP MAX UNIT Forward Transconductance1 1 SEP-30-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P5506BVG SOP-8 Lead-Free DYNAMIC Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge 2 Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 C) VDD = 30V ID 1A, VGS = 10V, RGEN = 6 VDS = 0.5V(BR)DSS, VGS = 10V, ID = 5.5A VGS = 0V, VDS = 25V, f = 1MHz 650 80 35 12.5 2.4 2.6 11 8 19 6 20 18 35 15 nS 18 nC pF Gate-Source Charge2 Gate-Drain Charge 2 2 Turn-On Delay Time2 Rise Time 2 Turn-Off Delay Time2 Fall Time Continuous Current Pulsed Current3 Forward Voltage1 1 2 IS ISM VSD IF = IS A, VGS = 0V 1.3 2.6 1 A V Pulse test : Pulse Width 300 sec, Duty Cycle 2%. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH "P5506BVG", DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name. 2 SEP-30-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P5506BVG SOP-8 Lead-Free Body Diode Forward Voltage Variation with Source Current and Temperature 100 V GS = 0V 10 Is - Reverse Drain Current(A) T A = 125 C 1 0.1 25 C 0.01 -55 C 0.001 0.0001 0 0.6 0.2 0.4 0.8 VSD - Body Diode Forward Voltage(V) 1.0 1.2 3 SEP-30-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P5506BVG SOP-8 Lead-Free 4 SEP-30-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P5506BVG SOP-8 Lead-Free SOIC-8(D) MECHANICAL DATA mm Dimension Min. A B C D E F G 1.35 0.1 4.8 3.8 5.8 0.38 mm Dimension Max. 5.0 4.0 6.2 0.51 H I J K L 1.75 0.25 M N 0 Typ. 4.9 3.9 6.0 0.445 1.27 1.55 0.175 Min. 0.5 0.18 Typ. 0.715 0.254 0.22 4 Max. 0.83 0.25 8 J F D E G I H K B C A 5 SEP-30-2004 |
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